This invention relates, in general, to integrated circuit technology, and more particularly to isolation region transistors with variable threshold voltages.
Integrated circuits in general are plagued with certain parasitic characteristics. These characteristics often cause unintended results in the integrated circuit. In particular, parasitic transistors may occur on an integrated circuit where a conductive region carries a voltage over an isolation region that lies between two diffusion regions. As will be recognized, this structure forms a transistor. If the voltage on the conductive region is high enough, the transistor turns on and electricity conducts through a channel under the isolation region between the two diffusion regions.
In the past, such parasitic transistors were undesirable. To remove them, semiconductor designers implanted the areas under the isolation region with channel stop implants. The channel stop implants raised the threshold voltage above the voltage level on the conductive regions. However, it is desirable to find a beneficial use from such parasitic transistors.
FIG. 1 shows a cross-section of an integrated circuit 100 with a parasitic transistor. Two transistor devices 110 are separated by a field oxide 120. Field oxide 120 electrically isolates devices 110 from each other. Devices 110 are shown as transistors with source and drain regions and a polysilicon gate. However, these devices may be any active device, such as diodes, transistors, and the like. Devices 110 may reside in a doped well 125 used to electrically bias the environment of devices 110, or may be formed in an undoped substrate. FIG. 1 shows n-type devices residing in a p-type well, however the opposite configuration is also used to form p-type devices.
Conductive region 130 lies on top of field oxide 120. Conductive region 130 may be polysilicon, metal, or other conductive material. For example, conductive region 130 may be a polysilicon trace for carrying interconnection signals between various devices on integrated circuit 100. Consequently, at times, conductive region 130 may carry a voltage bias.
It will be recognized by one of skill in the art, that this structure forms a parasitic transistor. Conductive region 130 acts as a gate, the two diffusion regions of devices 110 as the source and drain, and field oxide 120 as an insulating layer under the gate. When a voltage of sufficient magnitude, to overcome a threshold voltage is applied to conductive region 130, conduction may occur in a channel region between the two diffusion regions.
To compensate for this effect, it has been known to add a channel stop implant 140 beneath field oxide 120. Channel stop implant 140 is typically a doped material which raises the voltage threshold Vt of the parasitic transistor. Channel stop implant 140 is typically sufficient to raise Vt higher than any of the voltages used on the integrated circuit. Channel stop implant 140 is also known as a xe2x80x9cfield implant.xe2x80x9d Typically, with no channel stop implant 140, Vt of the parasitic transistor is approximately 8 volts to 10 volts. With channel stop implant 140, Vt is approximately 18 volts to 20 volts. In some embodiments, with no well 125 and no channel stop implant, Vt may be even lower, perhaps 2-3 volts.
One area in which presently available integrated circuits are limited is in their ability to handle voltages higher than the supply voltage (i.e., VDD.) Some integrated circuits, including programmable logic devices, EPROM memories, EEPROM memories, voltage pumps, etc. use higher voltages. For example, programmable logic device use Vpp, in a range from 6 volts to 16 volts, for programming logic functions. Currently available integrated circuits are limited in their ability to control devices using these higher voltages. Other high voltage problems, such as electrostatic discharge circuitry is also limited by currently available technology.
Consequently, new integrated circuit technology and methods for fabricating the integrated circuits are needed. In particular, a beneficial use for parasitic transistors is desirable.
The present invention provides an integrated circuit device that uses parasitic transistors beneficially as isolation region transistors. The isolation region transistors can withstand high voltages without breaking down. The present invention also provides a method for fabricating integrated circuits with isolation region transistors using existing integrated circuit fabrication processes.
The isolation region transistors are formed between the diffusion regions active devices. That is, the diffusion regions are the source and drain of the isolation region transistor, and a conductive region above an isolation region separating the diffusion regions is the gate. A channel stop implant is selectively implanted beneath the isolation region. This effectively provides a lower threshold voltage for the regions with no channel stop implant, compared with the threshold voltage for the regions with a channel stop implant. Thus, when the conductor carries sufficient voltage to exceed the threshold voltage in the regions with no channel stop implant, the isolation region transistor conducts, while the regions with the channel stop implant do not.
In a further embodiment of the present invention, a variable threshold isolation region transistor is provided. That is, the threshold voltage of an isolation region transistor may be varied using conventional integrated circuit fabrication methods. Briefly, the channel stop implant is formed in selected regions, but its length is varied, depending on the desired threshold voltage. Within a range, varying the length of the channel stop implant predictably varies the voltage threshold. The threshold voltage can be further varied by selectively placing the isolation region transistor in a doped well region.
The isolation region transistors provide, for example, a transistor device that can withstand higher voltages, such as the programming voltage Vpp, of an programmable integrated circuit. Especially advantageous is that the isolation region transistors can be fabricated with currently available and widely used fabrication processes. Further, many differing requirements may be addressed by the present invention, since the threshold voltage of the isolation region transistors may be varied from 2 volts to greater than 20 volts, again with no change to the fabrication process. This gives designers great flexibility, especially in high voltage designs.
A further understanding of the nature and advantages of the inventions herein may be realized by reference to the remaining portions of the specification and the attached drawings.